We are a microelectronic design and verification company, founded in 2013 in Istanbul, Turkey. We provide advanced design and verification services to our customers from specification to final GDSII for tapeout. We have more than a decade of ASIC/FPGA design experience at advanced technology nodes from 90nm down to 28nm and in applications where high reliability is key requirement (such as automotive), or where low power design is needed (for mobile or portable electronics).
Our services covers but not limited to frontend design activities such as RTL development in all three major languages (VHDL, Verilog, SystemVerilog), advanced verification using state of the art techniques (metric driven constrained random verification and UVM), and RTL2GDSII design activities such as DFT, synthesis (FPGA/ASIC), physical implementation (place and route, STA, DRC, LVS and final signoff), packaging and post silicon validation. We have designed board level systems with low-level firmware development.
ANKASYS also provides training services. Recent trainings are "3-day SystemVerilog for Verification" and "4-day Universal Verification Methodology (UVM)".
We develop SystemVerilog based, UVM compliant verification IPs. Recently we released ANKASYS SPI UVCS, which covers not only the verification IP (VIP) itself but also the surrounding integration and customization services.
We are targeting to develop our own software solutions as well and recently announced STDF (Standard Test DATA Format) analysis tool, the ANKASYS DAP (Data Analysis Platform). ANKASYS DAP helps test and quality engineers analyze the ATE generated data in a user-friendly and efficient way by providing direct access to plain text, csv or SDFT formatted files without requiring a database or a third party tool. We are working hard to achieve our goals and deliver high quality services and products to our customers.